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(parent: 1c3d6eb) | patch
Reduced hysteresis to 3 samples. Expanded valid pulse width range. master
authorArt Cancro <ajc@citadel.org>
Fri, 10 Nov 2023 05:30:43 +0000 (00:30 -0500)
committerArt Cancro <ajc@citadel.org>
Fri, 10 Nov 2023 05:30:43 +0000 (00:30 -0500)
commit87ba4567252d1aff961e59f3670c376e0778f4b1
tree367084f0329acf078544b8fee4f2e6bfebc525fetree | snapshot
parent1c3d6ebd421a632e522df17a94cf7406620451f8commit | diff
Reduced hysteresis to 3 samples.  Expanded valid pulse width range.
the_perfect_clock.ino diff | blob | history
Arduino WWVB clock