From: Art Cancro Date: Fri, 10 Nov 2023 05:30:43 +0000 (-0500) Subject: Reduced hysteresis to 3 samples. Expanded valid pulse width range. X-Git-Url: https://code.citadel.org/?p=the_perfect_clock.git;a=commitdiff_plain;h=HEAD Reduced hysteresis to 3 samples. Expanded valid pulse width range. --- diff --git a/the_perfect_clock.ino b/the_perfect_clock.ino index d437e39..2529492 100644 --- a/the_perfect_clock.ino +++ b/the_perfect_clock.ino @@ -87,27 +87,9 @@ void setup() { // Note: only write to the display when the readout needs to be updated. // Speaking I2C on every loop iteration jams the WWVB receiver. void loop() { - int signal; - static int total_samples = 0; - static int high_samples = 0; - - // read from the WWVB receiver, with some hysteresis - if (total_samples >= 100) { - if (high_samples > 20) { - signal = HIGH; - } - else { - signal = LOW; - } - total_samples = 0; - high_samples = 0; - } - else { - total_samples += 1; - if (digitalRead(wwvb) == HIGH) { - ++high_samples; - } - } + + // Reading it three times and taking the average gives us some hysteresis + int signal = (digitalRead(wwvb) + digitalRead(wwvb) + digitalRead(wwvb)) / 3; // has the timer ticked? unsigned long m = millis(); @@ -142,13 +124,13 @@ void loop() { else if ((!signal) && (previous_signal)) { // trailing edge of pulse detected pulse_length = millis() - start_of_pulse; - if (pulse_length > 175 && pulse_length < 225) { // "0" bit ~= 200 ms (represented as "0") + if (pulse_length > 150 && pulse_length < 250) { // "0" bit ~= 200 ms (represented as "0") this_pulse = 0; } - else if (pulse_length > 475 && pulse_length < 525) { // "1" bit ~= 500 ms (represented as "1") + else if (pulse_length > 450 && pulse_length < 550) { // "1" bit ~= 500 ms (represented as "1") this_pulse = 1; } - else if (pulse_length > 775 && pulse_length < 825) { // marker bit ~= 800 ms (represented as "2") + else if (pulse_length > 750 && pulse_length < 850) { // marker bit ~= 800 ms (represented as "2") this_pulse = 2; } else {